The present invention claims priority from Japanese Patent Application No. 9-12143 filed Aug. 6, 1997, which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a signal interpolation circuit and, particularly, to a signal interpolation circuit for interpolating a signal such as a phase signal which has a discontinuous point.
2. Description of Related Art
A prior art signal interpolation circuit is usually constructed with shift register stages 1-1, 1-2, . . . , 1-n and an interpolation circuit 2, as shown in FIG. 1, where n is a positive integer larger than 1. In such construction of the signal interpolation circuit, a train of sampled signals are input to the shift register stages 1-1 to 1-n. The number (n) of the shift register stages depends upon the interpolation system employed. Outputs of the shift register stages 1-1 to 1-n are input to the interpolation circuit 2 and interpolated therein.
Assuming that the input signal is a phase information of a signal moving on a two dimensional plane as shown in FIG. 2a, a presentation range of the input signal is usually limited within a range from 0 radian to 2.pi. radian. In such case, the phase of the input signal changes discontinuously between 0 radian and 2.pi. radian as shown in FIG. 2b even when the input signal is continuously changing practically. In FIGS. 2a and 2b, the sampled input signals are represented by black circles. In such case, when the conventional interpolation method is used, it is impossible to correctly interpolate the input signal as shown by a cross mark in FIG. 2b.
It may be possible to avoid this problem by enlarging the presentation range of the phase signal. In such case, however, it is necessary, when the length of the input signal is large, to enlarge the presentation range correspondingly, causing the circuit size to be increased. Further, when the length of the input signal is not definite, this method can not be applied.